ISL12026 View Datasheet(PDF) - Intersil

Part Name

Description

MFG CO.

ISL12026

Real Time Clock/Calendar with I2C Bus™ and EEPROM

Intersil 

ISL12026, ISL12026A

Package Outline Drawing

M8.173

8 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)

Rev 2, 01/10

A

24

3.0 ±0.5

8

5

SEE DETAIL "X"

6.40

4.40 ±0.10

CL

3

4

PIN 1

ID MARK

0.20 C BA

1

4

0.65

B

TOP VIEW

0.09-0.20

END VIEW

H

C

SEATING

PLANE

0.10 C

0.05

1.20 MAX

0.25 +0.05/-0.06 6

0.10 C B A

SIDE VIEW

0.90 +0.15/-0.10

0.05 MIN

0.15 MAX

1.00 REF

DETAIL "X"

GAUGE

PLANE 0.25

0°-8°

0.60 ±0.15

(5.65)

(1.45)

PACKAGE BODY

OUTLINE

(0.35 TYP)

(0.65 TYP)

TYPICAL RECOMMENDED LAND PATTERN

NOTES:

1. Dimensions are in millimeters.

Dimensions in ( ) for Reference Only.

2. Dimension does not include mold flash, protrusions or

gate burrs. Mold flash, protrusions or gate burrs shall

not exceed 0.15 per side.

3. Dimension does not include interlead flash or protrusion.

Interlead flash or protrusion shall not exceed 0.15 per side.

4. Dimensions are measured at datum plane H.

5. Dimensioning and tolerancing per ASME Y14.5M-1994.

6. Dimension on lead width does not include dambar protrusion.

Allowable protrusion shall be 0.08 mm total in excess of

dimension at maximum material condition. Minimum space

between protrusion and adjacent lead is 0.07mm.

7. Conforms to JEDEC MO-153, variation AC. Issue E

24

FN8231.9

November 30, 2010

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