AD8197A
SERIAL INTERFACE CONFIGURATION REGISTERS
The serial interface configuration registers can be read and written using the I2C serial control interface, Pin I2C_SDA, and Pin I2C_SCL.
The least significant bits of the AD8197A I2C part address are set by tying Pin I2C_ADDR2, Pin I2C_ADDR1, and Pin I2C_ADDR0 to
3.3 V (Logic 1) or 0 V (Logic 0). As soon as the serial control interface is used, the parallel control interface is disabled until the AD8197A
is reset, as described in the Serial Control Interface section.
Table 5. Serial (I2C) Interface Register Map
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
High Speed
Device
Modes
High
speed
channel
enable
High speed source select
HS_EN
0
0
0
0
HS_CH[1]
HS_CH[0]
Auxiliary
Device
Modes
Auxiliary
switch
enable
Auxiliary switch source select
AUX_EN 0
0
0
0
AUX_CH[1] AUX_CH[0]
Receiver
Settings
High speed
channel
input
termination
select
RX_TO
Input
Termination
Pulse
Register 1
RX_PT[7]
Source A and Source B : input termination pulse-on-source switch select
(disconnect termination for a short period of time)
RX_PT[6] RX_PT[5] RX_PT[4] RX_PT[3] RX_PT[2] RX_PT[1]
RX_PT[0]
Input
Termination
Pulse
Register 2
RX_PT[15]
Source C and Source D : input termination pulse-on-source switch select
(disconnect termination for a short period of time)
RX_ PT[14] RX_PT[13] RX_PT[12] RX_PT[11] RX_PT[10] RX_PT[9]
RX_PT[8]
Receive
Equalizer 1
RX_EQ[7] RX_EQ[6]
Source A and Source B: input equalization level select
RX_EQ[5] RX_EQ[4] RX_EQ[3] RX_EQ[2] RX_EQ[1]
RX_EQ[0]
Receive
Equalizer 2
Source C and Source D: input equalization level select
RX_EQ[15] RX_EQ[14] RX_EQ[13] RX_EQ[12] RX_EQ[11] RX_EQ[10] RX_EQ[9]
RX_EQ[8]
Transmitter
Settings
High speed output
pre-emphasis level
select
High speed
output
termination
select
High speed
output
current level
select
TX_PE[1] TX_PE[0] TX_PTO
TX_OCL
Addr.
0x00
0x01
0x10
0x11
0x12
0x13
0x14
0x20
Default
0x40
0x40
0x01
0x00
0x00
0x00
0x00
0x03
Rev. 0 | Page 18 of 28