PARALLEL CONTROL INTERFACE
The AD8197A can be controlled through the parallel interface
using the PP_EN, PP_CH[1:0], PP_EQ, PP_PRE[1:0], PP_OTO,
and PP_OCL pins. Logic levels for the parallel interface pins
are set in accordance with the specifications listed in Table 1.
Setting these pins updates the parallel control interface
registers, as listed in Table 18. Following a reset, the AD8197A
can be controlled through the parallel control interface until the
first serial control event occurs. As soon as any serial control
event occurs, the serial programming values override any prior
parallel programming values, and the parallel control interface
AD8197A
is disabled until the part is subsequently reset. The default serial
programming values correspond to the state of the serial
interface configuration registers, as listed in Table 5.
Note that after changing the status of the channel selection
(PP_CH[1:0]), it is necessary to assert a low logic level to
RESET to ensure that the channel-select status is properly
updated.
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