LA1784M View Datasheet(PDF) - SANYO -> Panasonic
Part Name
Description
MFG CO.
LA1784M Datasheet PDF : 50 Pages
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LA1784M
(1) When there is no AC noise on pin 32
V24 = V27–VBE
↑
QMRC
V27 is about 2.5 V when the antenna input is 60 dB or higher.
(2) Since the MRC noise amplifier gain is fixed, the MRC circuit is adjusted by reducing the AC input level.
32
+
Fig. 51
A11769
(3) The MRC attack and release are determined by C27 on pin 27.
Attack: 7 µA · C27 → 2 µA · C27
Release: 500 Ω · C27 → 100 Ω
Notes on the Noise Canceler
The noise canceler characteristics have been improved by implementing the circuit that determines the gate time in
logic. Since the time constant in earlier noise cancelers was determined by an RC circuit such as that shown in figure
52, the rise time shown in figure 53 was influenced by the values of the resistor and capacitor used. As a result the
noise exclusion efficiency was reduced by this delay in the rise time. In the LA1784M, this rise time was shortened by
implementing the circuit that determines the gate time in logic, allowing it to reliably exclude noise.
Fig. 52
A11771
Fig. 53
A11772
No. 6039-41/50
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