74V1T08
SINGLE 2-INPUT AND GATE
s HIGH SPEED: tPD = 4.7ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1µA(MAX.) at TA=25°C
s COMPATIBLE WITH TTL OUTPUTS:
) VIH = 2V (MIN), VIL = 0.8V (MAX)
t(s s POWER DOWN PROTECTION ON INPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
uc |IOH| = IOL = 8mA (MIN) at VCC = 4.5V
d s BALANCED PROPAGATION DELAYS:
ro tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
P VCC(OPR) = 4.5V to 5.5V
te s IMPROVED LATCH-UP IMMUNITY
ole DESCRIPTION
s The 74V1T08 is an advanced high-speed CMOS
b SINGLE 2-INPUT AND GATE fabricated with
O sub-micron silicon gate and double-layer metal
- wiring C2MOS technology.
t(s) The internal circuit is composed of 2 stages
including buffer output, which provide high noise
c immunity and stable output.
SOT23-5L
SOT323-5L
ORDER CODES
PACKAGE
SOT23-5L
SOT323-5L
T&R
74V1T08STR
74V1T08CTR
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
Obsolete Produ PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2004
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