V54C3128404V View Datasheet(PDF) - Mosel Vitelic Corporation
Part Name
Description
MFG CO.
V54C3128404V Datasheet PDF : 45 Pages
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MOSEL VITELIC
V54C3128(16/80/40)4V(BGA)
Clock Enable (CKE) Truth Table:
CKE CKE
STATE(n) n-1
n
CS RAS CAS WE Addr ACTION
Self-Refresh6 H
X
X
X
X
X
X INVALID
L
H
H
X
X
X
X EXIT Self-Refresh, Idle after tRC
L
H
L
H
H
H
X EXIT Self-Refresh, Idle after tRC
L
H
L
H
H
L
X ILLEGAL
L
H
L
H
L
X
X ILLEGAL
L
H
L
L
X
X
X ILLEGAL
L
L
X
X
X
X
X NOP (Maintain Self-Refresh)
Power-Down H
X
X
X
X
X
X INVALID
L
H
H
X
X
X
X EXIT Power-Down, > Idle.
L
H
L
H
H
H
X EXIT Power-Down, > Idle.
L
H
L
H
H
L
X ILLEGAL
L
H
L
H
L
X
X ILLEGAL
L
H
L
L
X
X
X ILLEGAL
L
L
X
X
X
X
X NOP (Maintain Low-Power Mode)
All. Banks
H
H
X
X
X
X
X Refer to the function truth table
Idle7
H
L
H
X
X
X
X Enter Power- Down
H
L
L
H
H
H
X Enter Power- Down
H
L
L
H
H
L
X ILLEGAL
H
L
L
H
L
X
X ILLEGAL
H
L
L
L
H
X
X ILLEGAL
H
L
L
L
L
H
X Enter Self-Refresh
H
L
L
L
L
L
X ILLEGAL
L
L
X
X
X
X
X NOP
Abbreviations:
RA = Row Address
CA = Column Address
BS = Bank Address
AP = Auto Precharge
Notes for SDRAM function truth table:
1. Current State is state of the bank determined by BS. All entries assume that CKE was active (HIGH) during the preceding clock cycle.
2. Illegal to bank in specified state; Function may be legal in the bank indicated by BS, depending on the state of that bank.
3. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
4. NOP to bank precharging or in Idle state. May precharge bank(s) indicated by BS (andAP).
5. Illegal if any bank is not Idle.
6. CKE Low to High transition will re-enable CLK and other inputs asynchronously. A minimum setup time must be satisfied before any
command other than EXIT.
7. Power-Down and Self-Refresh can be entered only from the All Banks Idle State.
8. Must be legal command as defined in the SDRAM function truth table.
V54C3128(16/80/40)4V(BGA) Rev. 1.2 September 2001
43
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