ML6510CQ-80 View Datasheet(PDF) - Micro Linear Corporation
Part Name
Description
MFG CO.
ML6510CQ-80 Datasheet PDF : 18 Pages
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ML6510
TABLE 1: ML6510-80 ROM CODES
SELECTION BITS
CODE DESCRIPTION
ROMMSB
0 PECL Input Clock, 1x mode
0
1 PECL Input Clock, 0.5x mode
0
2 PECL Input Clock, 2x mode
0
3 PECL Input Clock, 1x mode
0
4 TTL Input Clock, 1x mode
1
5 TTL Input Clock, 0.5x mode
1
6 TTL Input Clock, 2x mode
1
7 TEST mode, TTL Input clock
1
MCLK
0
0
1
1
0
0
1
1
MDOUT
0
1
0
1
0
1
0
1
INPUT
FREQ
(MHz)
40-80
40-80
20-40
40-80
40-80
40-80
20-40
0-50
OUTPUT
FREQ
(MHz)
40-80
20-40
40-80
40-80
40-80
20-40
40-80
0-50
CONFIGURATION CODE
CS CM R1, R0 M
1 1 01 0
1 1 10 5
1 1 01 2
1 0 01 0
0 0 01 0
0 0 10 5
0 0 01 2
0 ———
N TEST
0
0
20
5
0
0
0
0
0
20
5
0
—1
TABLE 2: ML6510-130 ROM CODES
CODE DESCRIPTION
0 PECL Input Clock, 1x mode
SELECTION BITS INPUT OUTPUT
FREQ FREQ
ROMMSB MCLK MDOUT (MHz) (MHz) CS
0
0
0 80-130 80-130 1
1 PECL Input Clock, 0.5x mode
0
0
1 80-160 40-80 1
2 PECL Input Clock, 2x mode
0
1
0 40-65 80-130 1
3 PECL Input Clock, 1x mode
0
1
1 80-130 80-130 1
4 TTL Input Clock, 1x mode
1
0
0 80-130 80-130 0
5 TTL Input Clock, 0.5x mode
1
0
1 80-130 40-65 0
6 TTL Input Clock, 2x mode
1
1
0 40-65 80-130 0
7 TEST mode, TTL Input clock
1
1
1 0-50 0-50 0
CONFIGURATION CODE
CM R1, R0 M
1 00 0
1 01 5
1 00 2
0 00 0
0 00 0
0 01 5
0 00 2
———
N DDSK
0
0
20
5
0
0
0
0
0
20
5
0
——
TEST
0
0
0
0
0
0
0
1
MCLK
(Input to ML6510)
tA2
tA1
tA5
01
02
MDOUT
(Input to ML6510)
M5
tA3
M4
tA4
18
N0
Figure 6. AUX Mode Waveform.
13
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