AD2S99/AD2S93 TYPICAL CONFIGURATION
Figure 5 shows a typical circuit configuration for the AD2S99
Oscillator and the AD2S93 LVDT-to-Digital Converter. The
maximum level of the A and B transducer input signals to the
AD2S93 should be 1 V rms ± 20%. All the analog ground sig-
nals should be star connected to the AD2S93 AGND pin. If
shielded twisted pair cables are used for the LVDT signals, the
AD2S99
shields should also be terminated at the AD2S93 AGND pin.
The SYNREF output of the AD2S99 cannot be used as the
REF input signal for the AD2S93. The zero crossing reference
for the AD2S93 should be taken from the primary winding of
the LVDT through a phase lead or lag network. The phase com-
pensation network ensures that the REF input is phase coherent
with the A and B input signals to the AD2S93.
SEL2 = GND
SEL1 = VSS
FOUT = 5kHz
VDD
VSS
0.1µF
4.7µF
NC = NO CONNECT
NC 4
SIN
5
DGND
6
COS 7
NC 8
3 2 1 20 19
AD2S99
TOP VIEW
(Not to Scale)
18 EXC
EXC
17
16 AGND
15 NC
14 NC
9 10 11 12 13
50kΩ
0.1µF
LOS
VDD
4.7µF
B
PRI
SEC
A
LVDT
C1
R2 C2
C4
R6 C3
R5
PHASE
COMP
25 24 23 22 21 20 19
R7
26 NC
27 B
28 A
1 AGND
2 DIFF
3 GAIN
4 LOS
AD2S93
TOP VIEW
(Not to Scale)
18
DMODOUT
VDD 17
VSS 16
DGND 15
0.1µF
0.1µF
DIR 14
NULL 13
OVR 12
VDD
4.7µF
4.7µF
VSS
5 6 7 8 9 10 11
NC = NO CONNECT
Figure 5. AD2S99 and AD2S93 Example Configuration
REV. B
–7–