Philips Semiconductors
Picture Improved Combined Network
(PICNIC)
Product specification
SAA4978H
1 FEATURES
• Clamp
• Analog AGC
• Triple YUV 9-bit Analog-to-Digital Converter (ADC)
• Triple bypassable analog anti-alias filter
• 4 MHz notch filter
• Non-linear phase filter after ADC
• 4 : 1 : 1 or 4 : 2 : 2 digital processing
• 4 : 1 : 1 or 4 : 2 : 2 selectable I/O interface
• Asynchronous digital input
• Time base correction
• Histogram analysis
• Histogram modification
• Subtitle detection
• Black bar detection
• Line memory based noise reduction (spatial)
• Noise level measurement
• Clamp noise reduction
• Dynamic peaking
• Energy measurement
• Multi Picture-In-Picture (multi PIP) decimation
• Differential Pulse Code Modulation (DPCM) data
decompression for colour
• 2D-peaking and coring
• Non-linear phase filter before DAC
• Coaxial Transceiver Interface (CTI)
• Triple 10-bit Digital-to-Analog Converter (DAC)
• Triple bypassable analog reconstruction filter
• Embedded microcontroller (80C51 core)
• Programmable signal positioner
• SNERT interface
• I2C-bus user control interface
• Boundary Scan Test (BST).
2 GENERAL DESCRIPTION
The SAA4978H is a monolithic integrated circuit suitable
either for 1fH or 2fH applications that contain a large variety
of picture improvement functions. It combines
analog-to-digital and digital-to-analog conversion for YUV
signals, digital processing, line-locked clock regeneration
and an 80C51 microcontroller core in one IC.
3 QUICK REFERENCE DATA
SYMBOL
VDDA
VDDD
IDDA
IDDD
fclk
S/N
PARAMETER
analog supply voltage
digital supply voltage
analog supply current
digital supply current
clock frequency
signal-to-noise ratio
CONDITIONS
VDDA = 3.45 V
VDDD = 3.6 V
default settings
MIN.
3.15
3.0
−
−
−
50
TYP.
3.3
3.3
145
210
16
−
MAX.
3.45
3.6
180
270
−
−
UNIT
V
V
mA
mA
MHz
dB
4 ORDERING INFORMATION
TYPE
NUMBER
SAA4978H
NAME
QFP160
PACKAGE
DESCRIPTION
plastic quad flat package; 160 leads (lead length 1.6 mm);
body 28 × 28 × 3.4 mm; high stand-off height
VERSION
SOT322-2
1999 May 03
3