LC7471
Vertical Display Control Register (0BDH)
The function of each bit in the vertical display control register is shown in the following table. Note that a LOW-level
pulse on RST resets all bits to 0.
Data bit
0
1
2
3
4
5
6
7
8
9
A
B
C
Name
VP0
VP1
VP2
VP3
VP4
VP5
VSZ10
VSZ11
VSZ20
VSZ21
VSZ30
VSZ31
–
Function
Selects the vertical start position of the display on the screen, VS, as given by the following equation
where H is the horizontal sync pulsewidth. Note that VS increments in multiples of 4 lines from line 0 to line 64.
Selects line 1 pixel height as shown in table 4.
Selects line 2 pixel height as shown in table 5.
Selects line 3 to line 12 pixel height as shown in table 6.
No function
Table 4. Line 1 pixel height
HSZ11 HSZ10
Height
0
0
0
1
1H/pixel
2H/pixel
1
0
1
1
3H/pixel
4H/pixel
Table 5. Line 2 pixel height
HSZ21 HSZ20
Height
0
0
1H/pixel
0
1
2H/pixel
1
0
3H/pixel
1
1
4H/pixel
Table 6. Line 3 to line 12 pixel height
VSZ31 VSZ30
Height
0
0
0
1
1H/pixel
2H/pixel
1
0
1
1
3H/pixel
4H/pixel
The relationships between the vertical sync and horizon-
tal sync pulses and between the horizontal and vertical
display start positions are shown in the following figure.
No.4088–6/12