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BR24G1MFVT-3AGTR View Datasheet(PDF) - ROHM Semiconductor

Part Name
Description
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BR24G1MFVT-3AGTR Datasheet PDF : 39 Pages
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BR24Gxxx-3A (128K 256K 1M)
Serial Input / Output Timing
tR
tF1
tHIGH
SCL
tHD:STA
70%
70% 70%
30%
30%
tSU:DAT
tLOW
70%
30%
70%
30%
tHD:DAT
70%
70%
70%
SDA
(INP(UT))
SDA
(outpuStD) A
(OUTP(UT) )
30%
tBUF
tPD
70%
30%
70%
30%
tDH
70%
30%
30%
70%
30%
Input read at the rise edge of SCL
Data output in sync with the fall of SCL
70%
30%
tF2
Figure 2-(a). Serial Input / Output Timing
70%
70%
70%
tSU:STA
tHD:STA
tSU:STO
70%
30% 30%
30%
30%
STARSTTACROTNDCITOINODNITION
STOP COSTNODPITICOONNDITION
Figure 2-(b). Start-Stop Bit Timing
D0
write data
(n-th address)
ACK
70%
70%
tWR
STOP CONDITION START CONDITION
Figure 2-(c). Write Cycle Timing
70%
DATA(1)
D1
D0 ACK
DATA(n)
ACK
70%
tWR
30%
tSU:WP
tSU:WP
30%
tHD:WP
STtHODP:WCOPNDITION
STOP CONDITION
Figure 2-(d). WP Timing at Write Execution
DATA(1)
DATA(n)
D1DATA(D1)0 ACK
DATA(n)
D1
D0 ACK tHIGH:WP
70tH%IGH:WP 70%
Fig1-(4) Write70c%ycle tim7i0n%g
ACK
ACK
70%
70%
tWR
tWR
Fig1-(5) FWigPurteim2in-(ge)a.tWwPriTteimeinxgecauttWiornite Cancel
Fig1-(6) WP timing at write cancel
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TSZ22111 15 001
5/36
TSZ02201-0R2R0G100020-1-2
24.Mar.2020 Rev.008

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