ISL8484 View Datasheet(PDF) - Renesas Electronics
Part Name
Description
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ISL8484
Renesas Electronics
ISL8484 Datasheet PDF : 13 Pages
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ISL8484
Test Circuits and Waveforms (Continued)
V+
C
SIGNAL
GENERATOR
NO OR NC
IN 0V OR V+
ANALYZER
RL
COM
GND
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
FIGURE 4. OFF-ISOLATION TEST CIRCUIT
SIGNAL
GENERATOR
V+
C
NO OR NC
COM
50
IN1
0V OR V+
ANALYZER
COM
NC or NO
NC
RL
GND
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
FIGURE 6. CROSSTALK TEST CIRCUIT
Detailed Description
The ISL8484 is a bidirectional, dual single pole/double throw
(SPDT) analog switch that offers precise switching capability
from a single 1.65V to 4.5V supply with low on-resistance
(0.29) and high speed operation (tON = 40ns, tOFF = 20ns).
The device is especially well suited for portable
battery-powered equipment due to its low operating supply
voltage (1.65V), low power consumption (4.5µW max), low
leakage currents (195nA max), and the tiny DFN and MSOP
packages. The ultra low on-resistance and rON flatness
provide very low insertion loss and distortion to applications
that require signal reproduction.
External V+ Series Resistor
For improved ESD and latch-up immunity Intersil
recommends adding a 100 resistor in series with the V+
power supply pin of the ISL8484 IC (see Figure 8).
FN6128 Rev 5.00
May 12, 2008
RON = V1/100mA
VNX
NO OR NC
100mA
V1
V+
C
IN 0V OR V+
COM
GND
Repeat test for all switches.
FIGURE 5. rON TEST CIRCUIT
IMPEDANCE
ANALYZER
NO OR NC
V+
C
IN 0V OR V+
COM
GND
Repeat test for all switches.
FIGURE 7. CAPACITANCE TEST CIRCUIT
During an overvoltage transient event, such as occurs during
system level IEC 61000 ESD testing, substrate currents can
be generated in the IC that can trigger parasitic SCR
structures to turn ON, creating a low impedance path from the
V+ power supply to ground. This will result in a significant
amount of current flow in the IC which can potentially create a
latch-up state or permanently damage the IC. The external V+
resistor limits the current during this over-stress situation and
has been found to prevent latch-up or destructive damage for
many overvoltage transient events.
Under normal operation the sub-microamp IDD current of the
IC produces an insignificant voltage drop across the 100
series resistor resulting in no impact to switch operation or
performance.
Page 7 of 13
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