MB3793-42PF-E1 View Datasheet(PDF) - Cypress Semiconductor

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MB3793-42PF-E1

Power-Voltage Monitoring IC with Watchdog Timer

Cypress Semiconductor 

MB3793-42

4. Block Functions

1. Comp. S

Comp. S is a comparator with hysteresis to compare the reference voltage with a voltage (VS) that is the result of dividing the power

voltage (VCC) by resistors R1 and R2. When VS falls below 1.24 V, a reset signal is output. This function enables the MB3793 to detect

an abnormality within 1 μs when the power is cut or falls abruptly.

2. Comp. O

Comp. O is a comparator to control the reset signal (RESET) output and compares the threshold voltage with the voltage at the CTP

terminal for setting the power-on reset hold time. When the voltage at the CTP terminal exceeds the threshold voltage, resetting is

canceled.

3. Reset Output Buffer

Since the reset (RESET) output buffer has CMOS organization, no pull-up resistor is needed.

4. Pulse Generator

The pulse generator generates pulses when the voltage at the CK1 and CK2 input clock terminals changes to High from Low level

(positive-edge trigger) and exceeds the threshold voltage; it sends the clock signal to the watchdog timer.

5. Watchdog Timer

The watchdog timer can monitor two clock pulses. Short-circuit the CK1 and CK2 clock terminals to monitor a single clock pulse.

6. Inhibition Terminal

The inhibition (INH) terminal forces the watchdog timer on/off. When this terminal is High level, the watchdog timer is stopped.

7. Flip-flop Circuit

The flip-flop circuit RSFF1 controls charging and discharging of the power-on reset hold time setting capacity (CTP). The flip-flop circuit

RSFF2 switches the charging accelerator for charging CTP during resetting on/off. This circuit only functions during resetting and does

not function at power-on reset.

Document Number: 002-08515 Rev. *C

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