HV7121B View Datasheet(PDF) - Hynix Semiconductor
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HV7121B Datasheet PDF : 30 Pages
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Electronics Industries Co., Ltd.
System IC Division
Register Set Descriptions
HV7121B
CMOS IMAGE SENSOR
With 8-bit ADC
All register access can though the I2C multi-byte read and write.
(1) Mode A Register (Address 00h, RO)
This register consist of a model name and revision number. Currently Hyundai has three types of CMOS image
sensor chip, 400*300, 640*480 and 800*600 resolution each. The upper 4 bits is model_name [3:0] and the lower
4 bits is rev_num[3:0]. For example it’ s value 12h, this mean 400*300 resolution and revision2.0 chip.
< model_name >
400*300 : 0001b
< rev_num >
Rev. 2.0 : 0010b
(2) Mode B Register (Address 01h, default : 04h, R/W)
This register defines major operation mode of the chip.
n Mode B[7:6] : oper_mode(operating mode) <default value : 00b>
Define operating modes between normal operation and optical and function test operation.
Test operation mode is used for optical and function test. Except for default value, these bits are
reserved for manufacturer.
Bit
operating mode
00
Normal operation
01
Reserved
10
Reserved
11
Reserved
n Mode B [5:4] : data_type(data types) <default value : 00b>
These bits define output pixel data types. For Correlated Double Sampling(CDS), every the pixel of image sensor
are measured twice, reference and data respectively, and reference values or data values can be read out through
pixel data pins selectively using these control bits. To remove the noise caused by circuit, i.e. Fixed Pattern Noise,
the image sensor performs the CDS in default value. Three output data types are supported as follows.
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. NO patent licenses are implied.
DA41990615R_1.0
Division
12
1999 Hyundai System IC
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