M24256-BFCS6G View Datasheet(PDF) - STMicroelectronics

Part Name

Description

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M24256-BFCS6G

256-Kbit serial I²C bus EEPROM

STMicroelectronics 

M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF

Instructions

5.2

Read operations

Read operations are performed independently of the state of the Write Control (WC) signal.

After the successful completion of a Read operation, the device internal address counter is

incremented by one, to point to the next byte address.

For the Read instructions, after each byte read (data out), the device waits for an

acknowledgment (data in) during the 9th bit time. If the bus master does not acknowledge

during this 9th time, the device terminates the data transfer and switches to its Standby

mode.

Figure 10. Read mode sequences

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$GGUHVV

5HDG

$&.

12$&.

'HYVHO

'DWDRXW

5:

5DQGRP

$GGUHVV

5HDG

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$&.

$&.

$&.

12$&.

'HYVHO

%\WHDGGU

%\WHDGGU

'HYVHO

'DWDRXW

5:

5:

6HTXHQWLDO

&XUUHQW

5HDG

6HTXHQWLDO

5DQGRP

5HDG

$&.

$&.

'HYVHO

'DWDRXW

5:

$&.

12$&.

'DWDRXW1

$&.

$&.

$&.

$&.

$&.

'HYVHO

%\WHDGGU

%\WHDGGU

'HYVHO

'DWDRXW

5:

5:

$&.

12$&.

'DWDRXW1

$,G

DS1766 Rev 34

19/47

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