74VHC374(2007) View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
View to exact match
74VHC374 Datasheet PDF : 9 Pages
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Logic Symbol
IEEE/IEC
Functional Description
The VHC374 consists of eight edge-triggered flip-flops
with individual D-type inputs and 3-STATE true outputs.
The buffered clock and buffered Output Enable are
common to all flip-flops. The eight flip-flops will store the
state of their individual D inputs that meet the setup and
hold time requirements on the LOW-to-HIGH Clock (CP)
transition. With the Output Enable (OE) LOW, the con-
tents of the eight flip-flops are available at the outputs.
When the OE is HIGH, the outputs go to the high imped-
ance state. Operation of the OE input does not affect the
state of the flip-flops.
Truth Table
Inputs
Dn
CP
OE
H
L
L
L
X
X
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Transition
Logic Diagram
Outputs
On
H
L
Z
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
Figure 1.
©1992 Fairchild Semiconductor Corporation
74VHC374 Rev. 1.3
2
www.fairchildsemi.com
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