Figure 8. Write Cycle Timing 1 (WE Controlled)
CE
tWC
tCA
tPC
tC W
A12-0
tAS
tAH
WE
tWS
tWH
tWP
OE
DQ7-0 (out)
DQ7-0 (in)
tWZ
tWX
tDH
tDS
FM1608B
Power Cycle Timing
Over the Operating Range
Parameter
Description
Min
tPU
Power-up (after VDD min. is reached) to first access time
10
tPD
Last write (WE HIGH) to power down time
0
tVR[8]
VDD power-up ramp rate
30
tVF[8]
VDD power-down ramp rate
30
Figure 9. Power Cycle Timing
VDD
t
VDD
VR
min
t PU
Access Allowed
VIL(max)
VDD min
t VF
t PD
VIH (min)
Max Unit
–
ms
–
µs
–
µs/V
–
µs/V
Note
8. Slope measured at any point on the VDD waveform.
Document Number: 001-86211 Rev. *C
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