IDT72511 View Datasheet(PDF) - Integrated Device Technology

Part Name

Description

View to exact match

IDT72511

PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024 x 18

Integrated Device Technology 

IDT72511/IDT72521

BIDIRECTIONAL FIRST-IN FIRST-OUT MEMORY

DETAILED BLOCK DIAGRAM

MILITARY AND COMMERCIAL TEMPERATURE RANGES

CSA

DSA

R/WA

A1

A0

Port A

DA0-DA17

Port A

Control

Reread Pointer

Load Reread

Reread

Write Pointer

Read Pointer

A B FIFO

18

18

Bypass Path

9

9

Port B

Control

LDRER

LDREW

RER

REW

RB (DSB) ==

WB (R/WB) ==

Port B

DB0-DB17

B A FIFO

18

18

FLGA*

FLGB*

FLGC*

FLGD*

16

Programmable

Flag Logic

Read Pointer

Write Pointer

Load Rewrite

Rewrite

Rewrite Pointer

Command

Status

Configuration 0

Configuration 1

Configuration 2

Configuration 3

Configuration 4

Configuration 5

Configuration 6

Configuration 7

NOTES:

(*) Can be programmed either active high or active low in internal configuration registerers.

(==) Can be programmed through an internal configuration register to be either an input or an output.

Reset

DMA

Control

RS

REQ*

ACK*

CLK

Programmable

I/O Logic

PIO5 ==

PIO4 ==

PIO3 ==

PIO2 ==

PIO1 ==

PIO0 ==

2668 drw 04

5.32

4

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