74LVC32A View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
View to exact match
74LVC32A Datasheet PDF : 14 Pages
| |||
NXP Semiconductors
4. Functional diagram
1 1A
2 1B
4 2A
5 2B
9 3A
10 3B
12 4A
13 4B
Fig 1. Logic symbol
1Y 3
2Y 6
3Y 8
4Y 11
mna242
74LVC32A
Quad 2-input OR gate
1
≥1
3
2
4
≥1
6
5
9
≥1
8
10
12
≥1
11
13
mna243
Fig 2. IEC logic symbol
A
B
Fig 3. Logic diagram for one gate
5. Pinning information
5.1 Pinning
Y
mna241
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
14 VCC
13 4B
12 4A
32
11 4Y
10 3B
9 3A
8 3Y
001aad101
Fig 4. Pin configuration for SO14 and (T)SSOP14
terminal 1
index area
1B 2
1Y 3
2A 4
2B 5
2Y 6
32
GND(1)
13 4B
12 4A
11 4Y
10 3B
9 3A
001aad102
Transparent top view
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 5. Pin configuration for DHVQFN14
74LVC32A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 17 November 2011
© NXP B.V. 2011. All rights reserved.
2 of 14
Share Link: 