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74HC160(2019) View Datasheet(PDF) - NXP Semiconductors.

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74HC160 Datasheet PDF : 15 Pages
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Nexperia
74HC160
Presettable synchronous BCD decade counter; asynchronous reset
MR
PE
D0
D1
D2
D3
CP
CEP
CET
Q0
Q1
Q2
Q3
TC
7 8 9 01 2 3
reset preset
count
inhibit
aaa-024743
Typical timing sequence:
reset outputs to zero; preset to BCD seven; count to eight, nine, zero, one, two and three; inhibit.
Fig. 7. Typical timing sequence
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
VI < -0.5 V or VI > VCC + 0.5 V
VO < -0.5 V or VO > VCC + 0.5 V
-0.5 V < VO < VCC + 0.5 V
-0.5
-
-
-
-
-50
-65
[1]
-
+7.0 V
±20 mA
±20 mA
±25 mA
+50 mA
- mA
+150 °C
500 mW
[1] For SO16 package: above 70 °C the value of Ptot derates linearly at 8 mW/K.
74HC160
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 27 March 2019
© Nexperia B.V. 2019. All rights reserved
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