CY8CPLC20 View Datasheet(PDF) - Cypress Semiconductor

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CY8CPLC20

Powerline Communication Solution

Cypress Semiconductor 

CY8CPLC20 Datasheet

hysteresis comparator. This eliminates the effects of correlator

delay and false logic triggers due to noise. The digital receiver

deserializes this data and outputs to the network layer for

interpretation.

Coupling Circuit Reference Design

The coupling circuit couples low voltage signals from the

CY8CPLC20 to the powerline. The topology of this circuit is

determined by the voltage on the powerline and design

constraints mandated by powerline usage regulations.

Cypress provides reference designs for a range of powerline

voltages including 110 V/240 V AC and 12 V/24 V AC/DC. The

CY8CPLC20 is capable of data communication over other

AC/DC Powerlines as well with the appropriate external coupling

circuit. The 110 V AC and 240 V AC designs are compliant to the

following powerline usage regulations:

■ FCC Part 15 for North America

■ EN 50065-1:2001 for Europe

Network Protocol

Cypress’s powerline optimized network protocol performs the

functions of the data link and network layers in an

ISO/OSI-equivalent model.

Figure 4. Powerline Network Protocol

Powerline Communication Solution

Powerline Network

Protocol

Physical Layer FSK

Modem

PLC Core

Embedded Application

Programmable

System Resources

Digital and Analog

Peripherals

Additional System

Resources

MAC, Decimator, I2C,

SPI, UART etc.

PSoC Core

Powerline Transceiver Packet

The network protocol implemented on the CY8CPLC20 supports

the following features:

■ Bidirectional half-duplex communication

■ Master-slave or peer-to-peer network topologies

■ Multiple masters on powerline network

■ 8-bit logical addressing supports up to 256 powerline nodes

■ 16-bit extended logical addressing supports up to 65536

powerline nodes

■ 64-bit physical addressing supports up to 264 powerline nodes

■ Individual, broadcast or group mode addressing

■ Carrier Sense Multiple Access (CSMA)

■ Full control over transmission parameters

❐ Acknowledged

❐ Unacknowledged

❐ Repeated Transmit

CSMA and Timing Parameters

■ CSMA – The protocol provides the random selection of a period

between 85 and 115 ms (out of seven possible values in this

range) in which the band-in-use (BIU) detector must indicate

that the line is not in use, before attempting a transmission.

■ BIU – A Band-In-Use detector, as defined under CENELEC EN

50065-1, is active whenever a signal that exceeds 86 dBmVrms

anywhere in the range 131.5 kHz to 133.5 kHz is present for

at least 4 ms. This threshold can be configured for different

end-system applications not requiring CENELEC

compliance.The modem tries to retransmit after every 85 to

115 ms when the band is in use. The transmitter times out after

1.1 seconds to 3 seconds (depending on the noise on the

Powerline) and generates an interrupt to indicate that the

transmitter was unable to acquire the powerline.

Powerline Transceiver Packet

The powerline network protocol defines a powerline transceiver

(PLT) packet structure, which is used for data transfer between

nodes across the powerline. Packet formation and data

transmission across the powerline network are implemented

internally in CY8CPLC20.

A PLT packet is divided into a variable length header (minimum

6 bytes to maximum 20 bytes, depending on address type), a

variable length payload (minimum 0 bytes to maximum 31

bytes), and a packet CRC byte.

This packet (preceded by a one byte preamble “0xAB”) is then

transmitted by the powerline modem PHY and the external

coupling circuit across the powerline.

The format of the PLT packet is shown in Table 1 on page 5.

Table 1. Powerline Transceiver (PLT) Packet Structure

Byte

Offset

0x00

0x01

0x02

0x03

0x04

Bit Offset

7 65

4

3

2

1

0

SA DA Type Service RSVD RSVD Response RSVD

Type

Type

Destination Address

(8-Bit Logical, 16-Bit Extended Logical or 64-Bit Physical)

Source Address

(8-Bit Logical, 16-Bit Extended Logical or 64-Bit Physical)

Command

RSVD

Payload Length

0x05

0x06

Seq Num

Powerline Packet Header CRC

Payload (0 to 31 Bytes)

Powerline Transceiver Packet CRC

Packet Header

The packet header contains the first 6 bytes of the packet when

1-byte logical addressing is used. When 8-byte physical

Document Number: 001-48325 Rev. *O

Page 5 of 58

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