NT68F62U View Datasheet(PDF) - Unspecified

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NT68F62U

8-Bit Microcontroller for Monitor (32K Flash MTP Type)

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NT68F62

6. Timing Generator

This block generates the system timing and control signals

to be supplied to the CPU and on-chip peripherals. A

crystal quartz, ceramic resonator, or an external clock

signal which will be provided to the OSCI pin generates

system timing. It generates 8MHz for the system clock and

4MHz for the CPU. Although internal circuits have a

feedback resistor and compacitor included, users can

externally add these components for proper operating.

The typical clock frequency is 8MHz. Different frequencies

will affect the operation of those on-chip peripherals whose

operating frequency is based on the system clock.

8MHz

OSCI

External Clock

OSCI

OSCO

(1)

NT68F62

Unconnected

OSCO

(2)

NT68F62

Figure 6.1. Oscillator Connections

7. RESET

The NT68F62 can be reset by the external reset pin or by

the internal watch-dog timer. This is used to reset or start

the microcontroller from a POWER DOWN condition.

During the time that this reset pin is held LOW (*reset line

must be held LOW for at least two CPU clock cycles),

writing to or from the µC is inhibited. When a positive edge

is detected on the RESET input, the µC will immediately

begin the reset sequence.

After a system initialization time of six CPU clock cycles,

the mask interrupt flag will be set and the µC will load the

program counter from the memory vector locations $FFFC

and $FFFD. This is the start location for program control.

An internal Schmitt Trigger buffer at the RESET pin is

provided to improve noise immunity.

The reset status is as follows:

1. PORT0、PORT1、PORT2、PORT3 (& PORT4) pins

will act as I/O ports with HIGH output

2. Sync processor counters reset and VCNT | HCNT

latches cleared

3. All sync outputs are disabled

4. Base timer is disabled and cleared

5. Various Interrupt sources are disabled and cleared

6. A/D converter is disabled and stopped

7. DDC1/2B+ function is disabled

8. PWM DAC0 – DAC6 output 50% duty waveform and

DAC7 - DAC12 is disabled

9. Watch-dog timer is cleared and enabled

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