M64897GP(2006) View Datasheet(PDF) - Renesas Electronics
Part Name
Description
View to exact match
M64897GP Datasheet PDF : 14 Pages
| |||
M64897GP
Data Cording Example
Write Mode Format Example
Byte
MSB
Address byte
1
1
0
0
0
1
1
Divider byte 1
0
1
0
0
0
0
0
Divider byte 2
1
0
1
0
0
0
0
Control byte 1
1
1
0
0
0
0
1
Band SW byte
0
0
0
0
1
0
0
Note: fVCO = N • 8 • fREF = 16544 • 8 • (4 MHz/1024) = 517 MHz
LSB Condotion in Data Setting
0
1 ADS input VCC1
0
1 Divider ratio N = 16544
0
1
0
1 fREF divider ratio 1/1024
0
1 BS4 output ON
Read Mode Format Example (Loop locked)
Byte
Address byte
Status byte
MSB
LSB Condotion in Data Setting
1
1
0
0
0
1
1
1
1 ADS Applied voltage
0.9 VCC1 to VCC1
0
1
1
1
1
0
1
1
1 ADS Applied voltage
0.45 VCC1 to 0.6 VCC1
Use data input for “1” so that the data of Read mode and Write mode return ACK signal “0” to micro computer in 9 bits
of each byte.
Test Mode Data Set Up Method
Test Mode Bit Set Up
X
: Random, 0 or 1. normal “0”
MA1, MA0 : Programmable address bit
Address Input Voltage
MA1
0 to 0.1 VCC1
0
Always valid
0
0.4 VCC1 to 0.6 VCC1
1
0.9 VCC1 to VCC1
1
Note: N14 to N0: How to set dividing ratio of the programmable the divider
Dividing ratio = N14 (214 = 16384) + +N0 (20 = 1)
Therefore, the range of divider N is 1,024 to 32,768
Example) fVCO = fREF • 8 • N
= 3.90625 • 8 • N
= 31.25 • N (kHz)
MA0
0
1
0
1
T2, T1, T0: Setting Up for The Test Mode
T2
T1
T0
Charge Pump
0
0
X Normal operation
0
1
X High impedance
1
1
0 Sink
1
1
1 Source
1
0
0 High impedance
1
0
1 High impedance
Pin 12 Condition
ADC input
ADC input
ADC input
ADC input
fREF output
f1/N output
Mode
Normal operation
Test mode
Test mode
Test mode
Test mode
Test mode
Rev.2.00 Jun 14, 2006 page 9 of 13
Share Link: 