SST89C54-33-I-PJ View Datasheet(PDF) - Silicon Storage Technology
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SST89C54-33-I-PJ Datasheet PDF : 50 Pages
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Interrupt Termination
If interrupt termination is selected, (SFCM[7] is set), then
an interrupt (INT1) will be generated to indicate flash
operation completion. Under this condition, the INT1
becomes an internal interrupt source. The INT1# pin can
now be used as a general purpose port pin, and it cannot
be a source of External Interrupt 1.
FlashFlex51 MCU
SST89C54 / SST89C58
Preliminary Specifications
For an interrupt to occur, appropriate interrupt enable
bits must be set. EX1 and EA bits of IE register must be
set. The TCON[2] (IT1) bit of TCON register must also be
set for edge trigger detection.
TABLE 6: IN-APPLICATION PROGRAMMING MODE COMMANDS
Operation
SFAH [7:0]
SFAL [7:0]
CHIP-ERASE
X
X
BLOCK-ERASE
AH2
X
SECTOR-ERASE
AH
AL
BYTE-PROGRAM
AH
AL
BURST-PROGRAM
AH
AL
BYTE-VERIFY (Read)
AH
AL
Notes:
X = Don’t Care; AL = Address low order byte; AH = Address high order byte;
DI = Data Input; DO = Data Output
All other values are in hex
1 Interrupt/Polling enable for flash operation completion
SFCM[7] = 1: Interrupt enable for flash operation completion
0: polling enable for flash operation completion
2 SFAH[7] = 0: Selects Block 0: SFAH[7:4] = Fh selects Block 1
SFDT [7:0]
55h
55h
X
DI
DI
DO
SFCM [6:0]1
01h
0Dh
0Bh
0Eh
06h
0Ch
344 PGM T6.3
TABLE 7: FLASH MEMORY PROGRAMMING/VERIFICATION PARAMETERS
Parameter1,2
Symbol
Reset Setup Time
TSU
Read-ID Command Width
TRD
PSEN# Setup Time
TES
Address, Command, Data Setup Time
Chip-Erase Time
Block-Erase Time
TADS
TCE
TBE
Sector-Erase Time
Program Setup Time
Address, Command, Data Hold
Byte-Program Time 3
Verify Command Delay Time
Verify High Order Address Delay Time
TSE
TPROG
TDH
TPB
TOA
TAHA
Verify Low Order Address Delay Time
First Burst-Program Byte Time4
Burst-Program Time 3,4
Burst-Program Recovery4
Burst-Program Time-Out Limit
TALA
TBUP1
TBUP
TBUPRCV
TBUPTO
Note:
1. Program and Erase times will scale inversely relative to programming clock frequency.
2. All timing measurements are from the 50% of the input to 50% of the output.
3. Each byte must be erased before program.
4. External Host Mode only.
Min
3
1
1.125
0
1.1
1.2
0
31
20
Max Units
µs
µs
µs
ns
11.7 ms
9.4 ms
2.3 ms
µs
ns
110 µs
50
ns
50
ns
50
ns
85
µs
45
µs
110 µs
µs
344 PGM T7.4
© 2000 Silicon Storage Technology, Inc.
30
344-2 8/00
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