SST89C54-33-I-NI View Datasheet(PDF) - Silicon Storage Technology
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SST89C54-33-I-NI Datasheet PDF : 50 Pages
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FlashFlex51 MCU
SST89C54 / SST89C58
Preliminary Specifications
TABLE 3C: WATCHDOG TIMER SFRS
WDTC* Watchdog Timer
C0h
-
Control
WDTD Watchdog Timer
86h
Data/Reload
* = Bit Addressable SFRs
-
-
- WDRE WDTS WDT SWDT X0h
1
WDRL
00h
344 PGM T3C.1
2
3
Watchdog Timer Control Register (WDTC)
Location
7
6
5
4
0C0h
–
–
–
–
3
2
1
0 Reset Value
4
WDRE WDTS WDT SWDT 00000000b
5
Symbol
Function
WDRE
Watchdog timer reset enable.
1: Enable watchdog timer reset.
2: Disable watchdog timer reset.
6
WDTS
Watchdog timer reset flag.
1: Hardware sets the flag on watchdog overflow.
7
0: External hardware reset clears the flag.
Flag can also be cleared by writing a 1.
Flag survives if chip reset happened because of watchdog timer overflow.
8
WDT
Watchdog timer refresh.
1: Software sets the bit to force a watchdog timer refresh.
0: Hardware resets the bit when refresh is done.
9
SWDT
Start watchdog timer.
1: Start WDT.
0: Stop WDT.
10
Watchdog Timer Data/Reload Register (WDTD)
11
Location
7
6
5
4
3
2
1
0 Reset Value
086h
Watchdog Timer Data/Reload
00000000b
12
Symbol
Function
13
WDTD
Initial/Reload value in Watchdog Timer.
14
15
16
© 2000 Silicon Storage Technology, Inc.
17
344-2 8/00
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