CS5132GDWR24 View Datasheet(PDF) - Cherry semiconductor
Part Name
Description
View to exact match
CS5132GDWR24 Datasheet PDF : 19 Pages
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Absolute Maximum Ratings
Pin Symbol
VCC1
VCC2
Pin Name
IC Logic and Low Side Driver Power Input
IC High Side Drivers Power Input
VMAX
16V
16V
COMP1, COMP2 Compensation Pins for the VCORE
6V
and VI/O error amplifiers.
VFB1, VOUT1, VID0-4, VCORE Voltage Feedback Input Pin,
VOUT2, VFB2, VFFB1, VCORE Output Voltage Sense Pin,
VFFB2
Voltage ID DAC Input Pins, VI/O Output Voltage
6V
Sense Pin, VI/O Voltage Feedback Input Pin,
VCORE PWM comparator Fast Feedback Pin, VI/O
PWM comparator Fast Feedback Pin.
COFF1, COFF2
Off-Time Pins for the VCORE and VI/O regulators
6V
GATE(H), GATE High-Side FET Drivers for the VCORE
16V
and VI/O regulators.
GATE(L)
Low-Side FET Driver
16V
PWRGD
Power-Good Output
6V
OVP
Overvoltage Protection
15V
PGnd
Power Ground
0V
LGnd
Logic Ground
0V
VMIN
-0.3V
-0.3V
-0.3V
ISOURCE
N/A
N/A
1mA
ISINK
1.5A Peak
200mA DC
3A Peak
400mA DC
5mA
-0.3V
1mA
1mA
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
0V
0V
1mA
50mA
1.5A Peak 1.5A Peak
200mA DC 200mA DC
1.5A Peak
200mA DC
1mA
1.5A Peak
200mA DC
30mA
30mA
1mA
3A Peak
400mA DC
N/A
40mA
N/A
Operating Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 125¡C
Lead Temperature Soldering:
Reflow (SMD styles only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 sec max. above 183ûC, 230ûC Peak
Storage Temperature Range, TS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 150ûC
ESD Susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
PACKAGE PIN #
23,24,1,2,3
20
17
18
19
16
15
21
22
Package Pin Description
PIN SYMBOL
VIDO Ð VID4
VCC1
GATE(H)
PGnd
GATE(L)
VCC2
GATE
OVP
PWRGD
FUNCTION
Voltage ID DAC inputs. These pins are internally pulled up to 5.65V if
left open. VID4 selects the DAC range. When VID4 is high (logic one),
the Error Amp reference range is 2.125V to 3.525V with 100mV incre-
ments. When VID4 is low (logic zero), the Error amp reference voltage
is 1.325V to 2.075V with 50mV increments.
Input power supply pin for the internal circuitry, and low side gate
driver. Decouple with filter capacitor to PGnd.
High side switch FET driver pin for VCORE section.
Power ground for VCORE and VI/O section.
Low side synchronous FET driver pin.
Input power supply pin for on-board high side gate drivers. Decouple
with filter capacitor to PGnd.
High side switch FET driver pin for VI/O section.
Overvoltage protection pin. Goes high when overvoltage condition is
detected on VFB1.
Power-Good Output. Open collector output drives low when VFB1 is
out of regulation.
2
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