WM8591 View Datasheet(PDF) - Wolfson Microelectronics plc

Part Name

Description

View to exact match

WM8591

24-bit, 192kHz Stereo CODEC

Wolfson Microelectronics plc 

Production Data

MASTER CLOCK TIMING

WM8591

Figure 1 Master Clock Timing Requirements

Test Conditions

AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, TA = +25oC

PARAMETER

SYMBOL

System Clock Timing Information

ADC/DACMCLK System clock

pulse width high

tMCLKH

ADC/DACMCLK System clock

pulse width low

tMCLKL

ADC/DACMCLK System clock

cycle time

tMCLKY

ADC/DACMCLK Duty cycle

TEST CONDITIONS

Table 1 Master Clock Timing Requirements

DIGITAL AUDIO INTERFACE – MASTER MODE

DACBCLK

ADCBCLK

WM8591 ADCLRC

CODEC DACLRC

DOUT

DIN

DVD

Controller

MIN

11

11

27

40:60

TYP

MAX

UNIT

ns

ns

ns

60:40

Figure 2 Audio Interface – Master Mode

w

PD Rev 4.0 December 2005

9

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