VPS13 View Datasheet(PDF) - SANYO -> Panasonic
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VPS13 Datasheet PDF : 4 Pages
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VPS13
Thermal Design
Since the VPS13 includes three channels as shown in the circuit diagram on page 2, we first consider a single channel.
The chip temperature of each transistor under actual operating conditions is determined using the following formula.
Tj = (Tri) = θj-c (Tri) × Pc (Tri) + ∆Tc + Ta (°C) .......................(1)
θj-c (Tri) : Thermal resistance of an individual transistor
Pc(Tri) : Collector loss for an individual transistor
∆Tc
: Case temperature rise
Ta
: Ambient temperature
The θj-c (Tri) for each chip is: θj-c (Tr1) = 35°C/W
θj-c (Tr2) to (Tr4) = 30°C/W.......................................................(2)
Although the loss for each transistor in a video pack varies with frequency and is not uniform, if we assume the
maximum operating frequency, f = 130 MHz (clock), then the chip with the largest loss will be transistor 3 (Tr3) of the
emitter-follower stage. From the Pd-f (clock) figure we see that loss will be 22% of the total loss for a single channel:
Pc (emitter-follower stage)(f = 130 MHz) = Pd (1ch) (f = 130 MHz) × 0.22 [W] (3)
Here, we must select a heat sink with a capacity θh such that the Tj of these transistors does not exceed 150°C. Equation
(4) below gives the relationship between θh and ∆Tc.
∆Tc = Pd (Total) × θh ..................................................................(4)
The required θh is calculated using this equation and equation (1).
No. 5548-3/4
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