M5M29F25611VP View Datasheet(PDF) - MITSUBISHI ELECTRIC

Part Name

Description

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M5M29F25611VP

MORE THAN 16,057 SECTORS (271,299,072 BITS) CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY

MITSUBISHI ELECTRIC  

MITSUBISHI LSIs

M5M29F25611VP

Mode Selection

Mode

Deep Standby

Standby

Output disable

Status register read

Pin

(note4)

(note1)

Command Write

(note2)

MORE THAN 16,057 SECTORS (271,299,072 BITS)

CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY

(note3)

SC

R/

X

X

X

VIH

X

X

VIL

VIH

VIH

VIL

VIL

VIH

X

VILR

X

X

VIHR

X

X

VIHR

X

X

VIHR

X

VOH

VOH

VOH

VOH

VIL

VIH

VIL

VIL

VIHR

VIL

VOH

DQ0 - DQ7

Hi - Z

Hi - Z

Hi - Z

Status register

outputs

Din

Notes: 1. Default mode after the power on is the status register read mode(refer to status transition P.11).

From DQ0 to DQ7 pins output the status when =VIL and =VIL.

2. Refer to the command definition(P.5). Data can be read, programmed and erased after commands

are written in this mode.

3. The R/ bus should be pulled up to Vcc to maintain the VOH level while the R/ pin outputs

a high impedance.

4. An X means “Don’t care”. The pin level can be set to either VIL or VIH as shown on page 12.

Pin Description

is used to select the device. The status returns to the Standby at the rising edge of in the

reading operation. However, the status does not return to the Standby at the rising edge of in

the busy state in programming and erase operation.

Memory data, status register data and identifier code (ID code) can be read, when is VIL.

Commands and address are latched at the rising edge of .

SC

Programming and reading data is latched at the rising edge of SC.

pin must be kept at the VILR (GND±0.2V) level when Vcc is turned on and off. In this way,

data in the memory is protected against unintentional erase and programming.

must be kept

at the VIHR (Vcc±0.2V) level during any operations such as programming, erase and read

Commands and data are latched when

is VIL and Address is latched when

is VIH.

R/

The R/ indicates the program/erase status of the flash memory. The R/ signal is initially at a

high impedance state. It turns to a VOL level after the (40H) command in programming operation or

the(B0H) command in erase operation. No commands can be written during the R/ pin outputs a VOL.

After the erase or programming operation finishes, the R/ signal turns back to the high impedance state.

The R/ indicates the first access status of the flash memory in serial read (1) and (2). It turns to

a VOL level after the sector address (SA(2)) in serial read (1) and serial read (2) operation.

No commands can be written during the R/ pin outputs a VOL. Also, no serial clock can be input during

the R/ pin outputs a VOL. After the first access operation finishes, the R/ signal turns back to the high

impedance state.

DQ0-DQ7

The DQ pins are used to input data, address and command, and are used to output memory data,

status register data and identifier code (ID code).

4

Rev.2.3.1 2001.2.2

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