ST3M01 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

View to exact match

ST3M01

TRIPLE VOLTAGE REGULATOR

STMicroelectronics 

CONNECTION DIAGRAM (top view)

ST3M01

PIN DESCRIPTION

Pin N°

1

2

3

4

5

6

7

8

9

10

11

12

13

14

Symbol

GND SW

GND SW

Virtual GND

LBO

VREF

IN Linear

OUT LB

SHDN

GND Signal

OUT LA

OUT DC/DC

IN SW

LX

LX

Name and Function

Switching Ground. Must be low impedance; solder directly to GND plane

Switching Ground. Must be low impedance; solder directly to GND plane

Virtual GND. Open Drain N-Cnannel MOSFET: must be high impedance when the

Low Battery condition is detected.

Low Battery Output. Open Drain N-Cnannel MOSFET: sinks current when the

input voltage drops below 2V typically.

Reference Voltage Output. Bypass with 0.1 µF to improve the linears VREF

thermal noise performance.

Linear Input. Must be connected togheter with IN SW to the input supply.

Linear B Output port. 1.9V typically.

Shutdown Input. Disables the SMPS and LA output, but the LB, the

referencevoltage and the low batery comparator remain active.

Signal GND. Must be connected togheter with the Switching Ground.

Linear A Output port. 3V typically.

DC/DC Output Port: 3.3V typically.

SMPS Input. Must be connected togheter with IN_Linear to the input supply.

1.5A N-Channel Power MOSFET Drain.

1.5A N-Channel Power MOSFET Drain.

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