MM1407 View Datasheet(PDF) - Mitsumi

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MM1407

Audio

Mitsumi 

MITSUMI

Figure C. Watchdog Timer

Watchdog Timer Circuit Block Diagram

Audio MM1407

Basically, the watchdog timer monitors the level (3) of the current it impresses on the external capacitor. The

charging time is determined by C1 and I2 in the block diagram, and control is done by input signal (1). When

the first "H" trigger (input signal) chargers the external capacitor and level (3) goes over (4) "H" threshold

value, output is first inverted (L H). While the input signal is being continuously impressed, the timer repeats

charging current impress/stop to the external capacitor, but if input signal (1) is not impressed within the set

time (clock monitoring time), charging to the external capacitors is stopped and the capacitor starts discharge

operation. Then level (3) falls below "L" threshold value and output (5) is again inverted (H L).

1. WAKEUP pin input signal cycle limit

Use at 1/Ta or higher, 100Hz or lower.

T1: clock monitoring time (The time from WAKEUP signal input stop until logic truth table WAKEUP

switches to low.)

2. WAKEUP pin input signal amplitude limit

Use at 1.5V or higher, 5V or lower.

3. External capacitor time constant (sets clock monitoring time)

Determined by T1 = 1.638 C µF R [Ω].

(E.g.: If C = 1µF, for T1 .=. 1S, R = 620kΩ, for T1 .=. 2S, R = 1.2MΩ)

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