AD8401 View Datasheet(PDF) - Analog Devices
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AD8401 Datasheet PDF : 12 Pages
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AD8401
An active low pulse, at any time, on the RESET pin asynchro-
nously forces all DAC register bits to zero. The DAC output
voltage becomes zero volts and stays at that value until a new
data word is loaded into the DAC register with a new WR com-
mand. The equivalent input logic for the DAC register loading
is shown in Figure 9.
TO DAC LADDER
CS
D0 D7
WR
DAC REGISTER
RESET
INPUT DATA
Figure 9. Equivalent DAC Register Control Logic
TYPICAL PERFORMANCE CHARACTERISTICS
1.0
VDD = +5V
TA = +25°C
0.5
0
–0.5
–0.1
0
64
128
192
256
DIGITAL INPUT CODE – DECIMAL
Figure 10. ADC Linearity Error vs. Digital Code
1.0
VDD = +5V
TA = +25°C
0.5
0
–0.5
–0.1
0
64
128
192
256
DIGITAL INPUT CODE – DECIMAL
Figure 11. DAC Linearity Error vs. Digital Code
120
110
SS = 300 UNITS
TA = +25°C
100
90
80
70
60
50
40
30
20
10
0
–4.5 –3.5 –2.5 –1.5 –0.5 0.5 1.5 2.5 3.5 4.5
FULL SCALE ERROR – LSB
Figure 12. ADC Full-Scale Error Histogram
2.5
2.0
VDD = +5V
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–50
–25
0
25
50
TEMPERATURE – °C
75
100
Figure 13. ADC Full-Scale Error vs. Temperature
–8–
REV. 0
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