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MC74VHCT32A View Datasheet(PDF) - ON Semiconductor

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MC74VHCT32A Datasheet PDF : 7 Pages
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MC74VHCT32A
Quad 2-Input OR Gate /
CMOS Logic Level Shifter
with LSTTL Compatible Inputs
The MC74VHCT32A is an advanced high speed CMOS 2input
OR gate fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device input is compatible with TTLtype input thresholds and
the output has a full 5.0 V CMOS level output swing. The input
protection circuitry on this device allows overvoltage tolerance on the
input, allowing the device to be used as a logiclevel translator from
3.0 V CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic
to 3.0 V CMOS Logic while operating at the highvoltage power
supply.
The MC74VHCT32A input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74VHCT32A to be used to interface 5.0 V circuits to
3.0 V circuits. The output structures also provide protection when
VCC = 0 V. These input and output structures help prevent device
destruction caused by supply voltage input/output voltage mismatch,
battery backup, hot insertion, etc.
Features
High Speed: tPD = 3.8 ns (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
TTLCompatible Inputs: VIL = 0.8 V; VIH = 2.0 V
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: VOLP = 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
PbFree Packages are Available*
http://onsemi.com
MARKING
DIAGRAMS
14
SOIC14
VHCT32AG
D SUFFIX
AWLYWW
CASE 751A
1
1
14
TSSOP14
VHCT
DT SUFFIX
32A
CASE 948G
ALYW G
G
1
1
14
SOEIAJ14
M SUFFIX
CASE 965
74VHCT32
ALYWG
1
1
A
WL, L
Y
WW, W
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= PbFree Package
(Note: Microdot may be in either location)
†For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2009
1
January, 2009 Rev. 3
Publication Order Number:
MC74VHCT32A/D

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