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MC100EP105 View Datasheet(PDF) - ON Semiconductor

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Description
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MC100EP105 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
MC10EP105, MC100EP105
3.3V / 5V ECL Quad 2−Input
Differential AND/NAND
Description
The MC10/100EP105 is a quad 2input differential AND/NAND
gate. Each gate is functionally equivalent to the EP05 and LVEL05
devices. With AC performance much faster than the LVEL05 device,
the EP105 is ideal for applications requiring the fastest AC
performance available.
The 100 Series contains temperature compensation.
Features
275 ps Typical Propagation Delay
Maximum Frequency > 3 GHz Typical
PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = 3.0 V to 5.5 V
Open Input Default State
Safety Clamp on Inputs
PbFree Packages are Available*
http://onsemi.com
MARKING
DIAGRAMS*
LQFP32
FA SUFFIX
CASE 873A
MCxxx
EP105
AWLYYWWG
1 32
QFN32
MN SUFFIX
CASE 488AM
1
MCxxx
EP105
AWLYYWWG
G
xxx = 10 or 100
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = PbFree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
November, 2006 Rev. 11
Publication Order Number:
MC10EP105/D

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