M37640E8FP View Datasheet(PDF) - Mitsumi
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M37640E8FP Datasheet PDF : 96 Pages
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Ver 1.4
MITSUBISHI MICROCOMPUTERS
7640 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MSB
7
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
LSB
0
Bit 0-7
fPIN
320.00 KHz
2.00 MHz
4.00 MHz
6.00 MHz
12.00 MHz
24.00 MHz
FSM1
n10
n16
74
4A
11
0B
5
05
3
03
1
01
0
00
fVCO = 2 x fPIN x (n+1)
fVCO
48.00 MHz
48.00 MHz
48.00 MHz
48.00 MHz
48.00 MHz
48.00 MHz
Fig. 1.94. Frequency Synthesizer Multiply Control Register (FSM1)
Address: 006D16
Access: R/W
Reset: FF16
Frequency synthesizer multiply value, n, that is used to multiply the prescaler
output frequency, fPIN, up to 48.00 MHz
MSB
7
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
fIN
24.00 MHz
24.00 MHz
24.00 MHz
24.00 MHz
24.00 MHz
24.00 MHz
FSM2
n10
n16
255
FF
11
0B
5
05
3
03
1
01
0
00
fPIN = fIN / (2 x (n+1))
fPIN
24.00 MHz
1.00 MHz
2.00 MHz
3.00 MHz
6.00 MHz
12.00 MHz
Bit 0
LSB
0
Bit 0-7
Fig. 1.95. Frequency Synthesizer Multiply Control Register (FSM2)
Address: 006E16
Access: R/W
Reset: FF16
Frequency synthesizer prescaler divide value, n. The input clock, fIN, is
divided by this value to produce the intermediate frequency, fPIN, which is
then multiplied up to 48.00 MHz. A value of 255 (FF16) turns the prescaler
off (no division of fIN).
MSB
7
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
fVCO
48.00 MHz
48.00 MHz
48.00 MHz
48.00 MHz
48.00 MHz
48.00 MHz
FSD
m10
m16
0
00
2
02
5
05
127
7F
128
80
255
FF
fSYN = fVCO / (2 x (m+1))
fSYN
24.00 MHz
8.00 MHz
4.00 KHz
187.50 KHz
93.75 KHz
0.00 KHz
Bit 0
LSB
0
Bit 0-7
Fig. 1.96. Frequency Synthesizer divided Ratio Register (FSD)
Address: 006F16
Access: R/W
Reset: FF16
Frequency synthesizer divide value, m, by which the 48.00 MHz VCO
frequency is divided to produce the FSYN system clock frequency.
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