AT27LV520-90XI View Datasheet(PDF) - Atmel Corporation
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Description
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AT27LV520-90XI Datasheet PDF : 12 Pages
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AT27LV520
Rapid™ Programming Algorithm
A 50 µs ALE pulse width is used to program. The address
is set to the first location. VCC is raised to 6.5V and OE/VPP
is raised to 13.0V. Each address is first programmed with
one 50 µs ALE pulse without verification. Then a verifica-
tion/reprogramming loop is executed for each address. In
the event a byte fails to pass verification, up to 10 succes-
sive 50 µs pulses are applied with a verification after each
pulse. If the byte fails to verify after 10 pulses have been
applied, the part is considered failed. After the byte verifies
properly, the next address is selected until all have been
checked. OE/VPP is then lowered to VIH and VCC to 5.0V. All
bytes are read again and compared with the original data to
determine if the device passes or fails.
START
ADDR = FIRST LOCATION
VCC = 6.5V
VPP = 13.0V
PROGRAM ONE 50 µS PULSE
INCREMENT ADDRESS NO
LAST
ADDR.?
YES
ADDR = FIRST LOCATION
INCREMENT ADDRESS
NO
LAST
ADDR.?
PASS
X=0
VERIFY
BYTE
FAIL
YES
PROGRAM ONE 50 µS PULSE
INCREMENT X
NO
X = 10?
VCC = 5.0V
VPP = 5.0V
YES
COMPARE
ALL BYTES
TO ORIGINAL
DATA
PASS
DEVICE
PASSED
FAIL
DEVICE
FAILED
9
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