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LUPA-1300-M(2007) View Datasheet(PDF) - Cypress Semiconductor

Part Name
Description
View to exact match
LUPA-1300-M
(Rev.:2007)
Cypress
Cypress Semiconductor Cypress
LUPA-1300-M Datasheet PDF : 32 Pages
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LUPA-1300
Table 11. Pin description of the assembled LUPA-1300 sensor in the PGA 144 package (continued)
Pin
B11
B12
A15
C10
B10
A14
A13
A12
C9
B9
A11
A10
A9
C8
B8
A8
A7
B7
C7
A6
A5
A4
B6
C6
A3
B5
B4
C5
C4
fp
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
Name
n.c.
n.c.
n.c.
n.c.
n.c.
n.c.
n.c.
n.c.
n.c.
n.c.
Load_addr
Address
Clock_spi
Decy_load
Sync_y
Clock_y
Norow_sel
Sh_col
Pre_col
Sync_x
Clock_x
Decx_load
Black
Sel_active
Vdd
Gnd
Vdda
Gnd
Voo
Function
Description
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Biasing
Digital I/O
Digital I/O
Supply 5V
Ground
Supply 5V
Ground
Voo
Loads the address into the serial parallel interface (SPI)
Serial address to be downloaded into the SPI
Clock for the SPI
Bias for y address register: 27Kto ground and
capacitor of 100 nF to Vdd
Synchronisation of y-address register: active high
Clock of y-address register
Control signal for Norow_sel mode to reduce row
blanking time: active low
Control signal for Sh_col mode to reduce row blanking
time: active low (baseline method): active low
Additional control signal for reducing the row blanking
time
Synchronisation of the x-address register: active high
Clock of the x-address register
Bias for x address register: 27 Kto ground and
capacitor of 100 nF to Vdd
Controls black test function of the output stages: active
high, connect to ground if not used
set the output stages active or in standby mode: active
low
Supply voltage digital modules: 5V
Ground of the sensor
Supply voltage analog modules: 5V
Ground of the sensor
Supply voltage output stages: 5V
Document Number: 38-05711 Rev. *C
Page 24 of 32
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