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LIS331DL(2007) View Datasheet(PDF) - STMicroelectronics

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LIS331DL Datasheet PDF : 38 Pages
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Application hints
4
Application hints
Figure 6. LIS331DL electrical connection
Vdd
10uF
1
Vdd_IO
100nF
5
13
TOP VIEW
INT_1
INT_2
8
LIS331DL
GND
Digital signal from/to signal controller.Signal’s levels are defined by proper selection of Vdd_IO
The device core is supplied through Vdd line while the I/O pads are supplied through
Vdd_IO line. Power supply decoupling capacitors (100 nF ceramic, 10 µF Al) should be
placed as near as possible to the pin 14 of the device (common design practice).
All the voltage and ground supplies must be present at the same time to have proper
behavior of the IC (refer to Figure 3). It is possible to remove Vdd maintaining Vdd_IO
without blocking the communication bus, in this condition the measurement chain is
powered off.
The functionality of the device and the measured acceleration data is selectable and
accessible through the I2C/SPI interface.When using the I2C, CS must be tied high while
SDO must be left floating.
The functions, the threshold and the timing of the two interrupt pins (INT 1 and INT 2) can be
completely programmed by the user through the I2C/SPI interface.
4.1
Soldering information
The LGA package is compliant with the ECOPACK®, RoHS and “green” standard. It is
qualified for soldering heat resistance according to JEDEC J-STD-020C. Pin #1 indicator is
electrically connected to pin 1. Leave pin 1 indicator unconnected during soldering. Land
pattern and soldering recommendations are available at www.st.com.
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