ISL97642 View Datasheet(PDF) - Intersil

Part Name

Description

View to exact match

ISL97642

TFT-LCD DC/DC with Integrated Amplifiers

Intersil 

ISL97642

Electrical Specifications VIN = 3V, VBOOST = VSUP = 12V, VSRC = 20V, Over-temperature from -40°C to +85°C.

Unless Otherwise Specified. (Continued)

PARAMETER

DESCRIPTION

CONDITIONS

MIN

TYP

ILEAKCTL

tDrise

tDfall

VSRC

ISRC

CTL Input Leakage Current

CTL = AGND or IN

-1

CTL to OUT Rising Prop Delay

1kΩ from DRN to 8V, VCTL = 0V to

100

3V step, no load on OUT, measured

from VCTL = 1.5V to OUT = 20%

CTL to OUT Falling Prop Delay

1kΩ from DRN to 8V, VCTL = 3V to

100

0V step, no load on OUT, measured

from VCTL = 1.5V to OUT = 80%

SRC Input Voltage Range

SRC Input Current

Start-up sequence not completed

150

Start-up sequence completed

150

rONSRC

SRC ON-resistance

Start-up sequence completed

5

rONDRN

DRN ON-resistance

Start-up sequence completed

30

SEQUENCING

tON

Turn On Delay

CDEL = 100nF (See Figure 22)

tDEL1

Delay Between VBOOST and VOFF

CDEL = 100nF (See Figure 22)

tDEL2

Delay Between VON and VOFF

CDEL = 100nF (See Figure 22)

tDEL3

Delay From VON to VON-slice Enabled CDEL = 100nF (See Figure 22)

CDEL

Delay Capacitor

NOTE:

1. Limits should be considered typical and are not production tested.

10

10

10

10

22

100

MAX

1

UNIT

µA

ns

ns

30

V

250

µA

250

µA

10

Ω

60

Ω

ms

ms

ms

ms

nF

5

FN6436.0

June 18, 2007

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