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IDT54FCT646TSO(2002) View Datasheet(PDF) - Integrated Device Technology

Part Name
Description
View to exact match
IDT54FCT646TSO
(Rev.:2002)
IDT
Integrated Device Technology IDT
IDT54FCT646TSO Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
IDT54/74FCT646T/AT/CT
FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
PIN CONFIGURATION
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
CPAB 1
SAB 2
DIR 3
A1
4
A2
5
A3
6
A4
7
A5
8
A6
9
A7
10
A8
11
GND 12
24
VCC
23
CPBA
22 SBA
21
G
20
B1
19
B2
18
B3
17
B4
16
B5
15
B6
14
B7
13
B8
INDEX
432
28 27 26
A1
5
1
25
G
A2
6
24
B1
A3
7
23
B2
NC
8
22
NC
A4
9
21
B3
A5
10
20
B4
A6
11
19
B5
12 13 14 15 16 17 18
CERDIP/ SOIC/ SSOP/ QSOP/ TSSOP
TOP VIEW
LCC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max
Unit
VTERM(2) Terminal Voltage with Respect to GND
–0.5 to +7
V
VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V
TSTG Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–60 to +120
mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
PIN DESCRIPTION
Pin Names
Description
A1 - A8
Data Register A Inputs
Data Register B Outputs
B1 - B8
Data Register B Inputs
Data Register A Outputs
CPAB, CPBA
Clock Pulse Inputs
SAB, SBA
Output Data Source Select Inputs
DIR, G
Output Enable Inputs
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
Parameter(1)
Conditions Typ. Max. Unit
CIN
Input Capacitance
VIN = 0V
6
10 pF
COUT
Output Capacitance VOUT = 0V
8
12 pF
NOTE:
1. This parameter is measured at characterization but not tested.
2

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