IDT7282(1996) View Datasheet(PDF) - Integrated Device Technology

Part Name

Description

View to exact match

IDT7282
(Rev.:1996)

CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9, DUAL 512 x 9, DUAL 1024 x 9

Integrated Device Technology 

Integrated Device Technology, Inc.

CMOS DUAL ASYNCHRONOUS FIFO

DUAL 256 x 9, DUAL 512 x 9,

DUAL 1024 x 9

IDT7280

IDT7281

IDT7282

FEATURES:

• The 7280 is equivalent to two 7200 256x9 FIFOs

• The 7281 is equivalent to two 7201 512x9 FIFOs

• The 7282 is equivalent to two 7202 1024x9 FIFOs

• Low power consumption

— Active: 1540 mW (max.)

—Power-down: 5.50 mW (max.)

• Ultra high speed—15 ns access time

• Asynchronous and simultaneous read and write

• Offers optimal combination of data capacity, small foot

print and functional flexibility

• Ideal for bi-directional, width expansion, depth expan-

sion, bus-matching, and data sorting applications

• Status Flags: Empty, Half-Full, Full

• Auto-retransmit capability

• High-performance CMOS technology

• Space-saving TSSOP

• Industrial temperature range (-40oC to +85oC) is avail-

able, tested to military electrical specifications

DESCRIPTION:

The IDT7280/7281/7282 are dual-FIFO memories that

load and empty data on a first-in/first-out basis. These devices

are functional and compatible to two 7200/7201/7202 FIFOs

kin a single package with all associated control, data, and flag

lines assigned to separate pins. The devices use Full and

Empty flags to prevent data overflow and underflow and

expansion logic to allow for unlimited expansion capability in

both word size and depth.

The reads and writes are internally sequential through the

use of ring pointers, with no address information required to

load and unload data. Data is toggled in and out of the devices

through the use of the Write (W) and Read (R) pins.

The devices utilize a 9-bit wide data array to allow for

control and parity bits at the user’s option. This feature is

especially useful in data communications applications where

it is necessary to use a parity bit for transmission/reception

error checking. It also features a Retransmit (RT) capability

that allows for reset of the read pointer to its initial position

when RT is pulsed low to allow for retransmission from the

beginning of data. A Half-Full Flag is available in the single

device mode and width expansion modes.

The IDT7280/7281/7282 are fabricated using IDT’s high-

speed CMOS technology. They are designed for those appli-

cations requiring asynchronous and simultaneous read/writes

in multiprocessing and rate buffer applications.

FUNCTIONAL BLOCK DIAGRAM

DATA INPUTS

(DA 0–DA 8)

RSA

WA

WRITE

CONTROL

WRITE

POINTER

RAM

ARRAY A

256 x 9

512 x 9

1024 x 9

READ

POINTER

THREE-

STATE

BUFFERS

WB

WRITE

CONTROL

DATA INPUTS

(DB 0–DB 8)

RSB

WRITE

POINTER

THREE-

STATE

BUFFERS

RAM

ARRAY B

256 x 9

512 x 9

1024 x 9

READ

POINTER

RA

READ

CONTROL

FLAG

LOGIC

EXPANSION

LOGIC

RESET

LOGIC

READ

CONTROL

FLAG

LOGIC

EXPANSION

LOGIC

RESET

LOGIC

XIA

XOA/HFA FFA EFA

DATA

FLA/RTA

OUTPUTS

(QA 0–QA 8)

RB XIB

XOB/HFB FFB EFB

DATA

OUTPUTS

(QB 0–QB 8)

FLB/RTB

3208 drw 01

The IDT logo is a trademark of Integrated Device Technology, Inc.

COMMERCIAL TEMPERATURE RANGE

©1996 Integrated Device Technology, Inc.

For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.

5.07

DECEMBER 1996

DSC-3208/3

1

Share Link: