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IDT54FCT162823ATE View Datasheet(PDF) - Integrated Device Technology

Part Name
Description
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IDT54FCT162823ATE
IDT
Integrated Device Technology IDT
IDT54FCT162823ATE Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
IDT54/74FCT16823AT/BT/CT/ET, 162823AT/BT/CT/ET
FAST CMOS 18-BIT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16823AT/162823AT
FCT16823BT/162823BT
Com'l.
Mil.
Com'l.
Mil.
Symbol
Parameter
Condition(1)
Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
tPLH Propagation Delay
tPHL xCLK to xQx
tPHL
tPZH
tPZL
Propagation Delay
xCLR to xQx
Output Enable Time
xOE to xQx
tPHZ Output Disable Time
tPLZ xOE to xQx
tSU Set-up Time HIGH or LOW
xDx to xCLK
tH Hold Time HIGH or LOW
xDx to xCLK
tSU Set-up Time HIGH or LOW
xCLKEN to xCLK
tH Hold Time HIGH or LOW
xCLKEN to xCLK
tW xCLK Pulse Width
HIGH or LOW
tW xCLR Pulse Width LOW
CL = 50pF
1.5 10.0 1.5 11.5 1.5 7.5 1.5 8.5 ns
RL = 500
CL = 300pF(5) 1.5 20.0 1.5 20.0 1.5 15.0 1.5 16.0
RL = 500
CL = 50pF
1.5 14.0 1.5 15.0 1.5 9.0 1.5 9.5 ns
RL = 500
CL = 50pF
1.5 12.0 1.5 13.0 1.5 8.0 1.5 9.0 ns
RL = 500
CL = 300pF(5) 1.5 23.0 1.5 25.0 1.5 15.0 1.5 16.0
RL = 500
CL = 5pF(5)
1.5 7.0 1.5
8.0
1.5
6.5
1.5 7.0 ns
RL = 500
CL = 50pF
1.5 8.0 1.5 9.0 1.5 7.5 1.5 8.0
RL = 500
CL = 50pF
4.0
4.0
3.0
3.0
— ns
RL = 500
2.0
2.0
1.5
1.5
— ns
4.0
4.0
3.0
3.0
— ns
2.0
2.0
0
0
— ns
7.0
7.0
6.0
6.0
— ns
6.0
7.0
6.0
6.0
— ns
tREM Recovery Time xCLR to xCLK
tSK(o) Output Skew(3)
6.0
7.0
6.0
6.0
— ns
0.5
0.5
0.5
0.5 ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This limit is guaranteed but not tested.
5. This condition is guaranteed but not tested.
2772 tbl 09
5.16
6

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