HEF4059B View Datasheet(PDF) - Philips Electronics
Part Name
Description
View to exact match
HEF4059B Datasheet PDF : 6 Pages
| |||
Philips Semiconductors
Programmable divide-by-n counter
Product speciļ¬cation
HEF4059B
LSI
DESCRIPTION
The HEF4059B is a divide-by-n counter which can be
programmed to divide an input frequency by any number
n from 3 to 15 999. The output signal is a one clock-cycle
wide pulse and occurs at a rate equal to the input
frequency divided by n. The single output (O) has TTL
drive capability. The down counter is preset by means of
16 jam inputs (J1 to J16); continued on next page.
Fig.1 Functional block diagram.
PINNING
CP
Ka, Kb, Kc
J1 to J16
EL
O
clock input
mode select inputs
programmable jam inputs (BCD)
latch enable input
divide-by-n output
Fig.2 Pinning diagram.
FAMILY DATA, IDD LIMITS category LSI
See Family Specifications
January 1995
HEF4059BP(N): 24-lead DIL; plastic (SOT101-1)
HEF4059BD(F): 24-lead DIL; ceramic (cerdip) (SOT94)
HEF4059BT(D): 24-lead SO; plastic (SOT137-1)
( ): Package Designator North America
2
Share Link: 