HAL824 View Datasheet(PDF) - Micronas
Part Name
Description
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HAL824 Datasheet PDF : 32 Pages
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DATA SHEET
HAL 82x
– overvoltage and reverse-voltage protection at all
pins
– magnetic characteristics extremely robust against
mechanical stress
– short-circuit protected push-pull output
– EMC and ESD optimized design
1.3. Marking Code
The HAL82x has a marking on the package surface
(branded side). This marking includes the name of the
sensor and the temperature range.
Type
HAL 824
HAL 825
Temperature Range
A
K
824A
824K
825A
825K
1.4. Operating Junction Temperature Range (TJ)
The Hall sensors from Micronas are specified to the
chip temperature (junction temperature TJ).
A: TJ = −40 °C to +170 °C
K: TJ = −40 °C to +140 °C
The relationship between ambient temperature (TA)
and junction temperature is explained in Section 4.4.
on page 24.
1.5. Hall Sensor Package Codes
HALXXXPA-T
Temperature Range: A and K
Package: UT for TO92UT-1/-2
Type: 824 or 825
Example: HAL825UT-K
→ Type:
825
→ Package:
TO92UT
→ Temperature Range: TJ = −40 °C to +140 °C
Hall sensors are available in a wide variety of packag-
ing versions and quantities. For more detailed informa-
tion, please refer to the brochure: “Hall Sensors:
Ordering Codes, Packaging, Handling”.
1.6. Solderability and Welding
Solderability
During soldering reflow processing and manual
reworking, a component body temperature of 260 °C
should not be exceeded.
Welding
Device terminals should be compatible with laser and
resistance welding. Please note that the success of
the welding process is subject to different welding
parameters which will vary according to the welding
technique used. A very close control of the welding
parameters is absolutely necessary in order to reach
satisfying results. Micronas, therefore, does not give
any implied or express warranty as to the ability to
weld the component.
1.7. Pin Connections and Short Descriptions
Pin
Pin Name Type Short Description
No.
1
VDD
IN
Supply Voltage and
Programming Pin
2
GND
Ground
3
OUT
OUT Push Pull Output
and Selection Pin
1 VDD
OUT
3
2 GND
Fig. 1–1: Pin configuration
Micronas
Feb. 3, 2009; DSH000143_003EN
5
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