HEC40192BP View Datasheet(PDF) - Philips Electronics
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Description
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HEC40192BP Datasheet PDF : 9 Pages
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Philips Semiconductors
4-bit up/down decade counter
Product specification
HEF40192B
MSI
LOW to HIGH
VDD
V
5
10
15
SYMBOL MIN. TYP. MAX.
145 290 ns
tPLH
60 120 ns
45 90 ns
TYPICAL EXTRAPOLATION
FORMULA
118 ns + (0,55 ns/pF) CL
49 ns + (0,23 ns/pF) CL
37 ns + (0,16 ns/pF) CL
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL MIN. TYP. MAX.
Output transition times
HIGH to LOW
LOW to HIGH
Set-up time
Pn → PL
Hold time
Pn → PL
Minimum CPU or CPD
pulse width; LOW
Minimum MR
pulse width; HIGH
Minimum PL
pulse width; LOW
Recovery time
for MR
Recovery time
for PL
Maximum clock
pulse frequency
5
10 tTHL
15
5
10 tTLH
15
5
10 tsu
15
5
10 thold
15
5
10 tWCPL
15
5
10 tWMRH
15
5
10 tWPLL
15
5
10 tRMR
15
5
10 tRPL
15
5
10 fmax
15
60 120 ns
30 60 ns
20 40 ns
60 120 ns
30 60 ns
20 40 ns
160
80
ns
60
30
ns
50
25
ns
10 −70
ns
5 −25
ns
5 −20
ns
150
75
ns
50
25
ns
35
20
ns
180
90
ns
70
35
ns
60
30
ns
120
60
ns
45
20
ns
30
15
ns
125
65
ns
70
35
ns
50
25
ns
90
45
ns
35
15
ns
25
10
ns
2,5
5
MHz
7
14
MHz
9
18
MHz
TYPICAL EXTRAPOLATION
FORMULA
10 ns + (1,0 ns/pF) CL
9 ns + (0,42 ns/pF) CL
6 ns + (0,28 ns/pF) CL
10 ns + (1,0 ns/pF) CL
9 ns + (0,42 ns/pF) CL
6 ns + (0,28 ns/pF) CL
see also waveforms
Fig.6
January 1995
7
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