FSL136MR View Datasheet(PDF) - Fairchild Semiconductor
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FSL136MR Datasheet PDF : 13 Pages
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is lower than 1.0µs, the FPS recognizes this condition
as an abnormal error and shuts down PWM switching
until VCC reaches VSTART again. An abnormal condition
output is shown in Figure 20.
Figure 20. Output Short Waveforms (OSP)
Soft-Start
The FPS has an internal soft-start circuit that slowly
increases the feedback voltage, together with the
SenseFET current, after it starts. The typical soft-start
time is 15ms, as shown in Figure 21, where progressive
increments of the SenseFET current are allowed during
the startup phase. The pulse width to the power
switching device is progressively increased to establish
the correct working conditions for transformers,
inductors, and capacitors. The voltage on the output
capacitors is progressively increased with the intention
of smoothly establishing the required output voltage.
Soft-start helps prevent transformer saturation and
reduce the stress on the secondary diode.
Figure 22. Burst-Mode Operation
Adjusting Peak Current Limit
As shown in Figure 23, a combined 6kΩ internal
resistance is connected to the non-inverting lead on the
PWM comparator. An external resistance of Rx on the
current limit pin forms a parallel resistance with the 6kΩ
when the internal diodes are biased by the main current
source of 400µA. For example, FSL136MR has a typical
SenseFET peak current limit (ILIM) of 2.15A. ILIM can be
adjusted to 1.5A by inserting Rx between the IPK pin and
the ground. The value of the Rx can be estimated by
the following equations:
2.15A:1.5A = 6kΩ: XkΩ
(1)
X = Rx || 6kΩ
(2)
where X is the resistance of the parallel network.
Figure 21. Internal Soft-Start
Burst Operation
To minimize power dissipation in standby mode, the
FPS enters burst mode. As the load decreases, the
feedback voltage decreases. As shown in Figure 22,
the device automatically enters burst mode when the
feedback voltage drops below VBURH. Switching
continues until the feedback voltage drops below VBURL.
At this point, switching stops and the output voltages
drop at a rate dependent on standby current load. This
causes the feedback voltage to rise. Once it passes
VBURH, switching resumes. The feedback voltage then
falls and the process repeats. Burst mode alternately
enables and disables switching of the SenseFET and
reduces switching loss in standby mode.
© 2009 Fairchild Semiconductor Corporation
FSL136MR • Rev. 1.0.7
11
Figure 23. Peak Current Limit Adjustment
www.fairchildsemi.com
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