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AT27BV4096(2005) View Datasheet(PDF) - Atmel Corporation

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AT27BV4096 Datasheet PDF : 14 Pages
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18. Rapid Programming Algorithm
A 50 µs CE pulse width is used to program. The address is set to the first location. VCC is raised
to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 50 µs CE pulse
without verification. Then a verification/reprogramming loop is executed for each address. In the
event a word fails to pass verification, up to 10 successive 50 µs pulses are applied with a verifi-
cation after each pulse. If the word fails to verify after 10 pulses have been applied, the part is
considered failed. After the word verifies properly, the next address is selected until all have
been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All words are read again and com-
pared with the original data to determine if the device passes or fails.
10 AT27BV4096
START
ADDR = FIRST LOCATION
VCC = 6.5V
VPP = 13.0V
PROGRAM ONE 50 µS PULSE
INCREMENT ADDRESS NO
LAST
ADDR.?
YES
ADDR = FIRST LOCATION
INCREMENT ADDRESS
NO
LAST
ADDR.?
PASS
X=0
VERIFY
WORD
FAIL
YES
PROGRAM ONE 50 µS PULSE
INCREMENT X
NO
X = 10?
VCC = 5.0V
VPP = 5.0V
YES
COMPARE
ALL WORDS
TO ORIGINAL
DATA
PASS
DEVICE
PASSED
FAIL
DEVICE
FAILED
0640D–EPROM–10/05

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