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DG408DJ View Datasheet(PDF) - Intersil

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Description
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DG408DJ Datasheet PDF : 17 Pages
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DG408, DG409
Test Circuits and Waveforms (Continued)
+2.4V
LOGIC
INPUT
50
+15V
V+
EN ALL S AND DA
A0 DG408
A1 DG409
A2 GND V- D, DB
+5V (VS)
300
SWITCH
OUTPUT
VO
35pF
-15V
LOGIC 3V
INPUT
0V
VS
SWITCH
OUTPUT
VO
0V
80%
80%
tOPEN
tr < 20ns
tf < 20ns
FIGURE 3A. TEST CIRCUIT
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. BREAK-BEFORE-MAKE INTERVAL
+15V
VGEN
RGEN
CHANNEL
SELECT
LOGIC INPUT
SX
A0
A1
A2
EN GND
V+
D
V-
-15V
VO
CL
10nF
3V
LOGIC
INPUT 0V
SWITCH
OUTPUT
ON
OFF
VO
VO IS THE MEASURED VOLTAGE DUE
TO CHARGE TRANSFER ERROR, Q
Q = CL x VO
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. CHARGE INJECTION
0V +15V
VIN
SX EN V+
|
|
VO
S8
D
SIGNAL
GENERATOR
A2
1k
A1
A0
V-
GND
-15V
ANALYZER
OFF ISOLATION = 20 Log V-----O-----U-----T--
VIN
FIGURE 5. OFF ISOLATION
7
5V +15V
1k
VIN
SIGNAL
GENERATOR
S1 EN V+
SX
|
|
VO
S8
D
A2
1k
A1
A0
V-
ANALYZER
GND
-15V
CROSSTALK = 20 Log V-----O-----U-----T--
VIN
FIGURE 6. CROSSTALK
FN3283.8
June 13, 2006

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