CYRF69213(2007) View Datasheet(PDF) - Cypress Semiconductor
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CYRF69213 Datasheet PDF : 85 Pages
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CYRF69213
Table 3. CPU Flags Register (CPU_F) [R/W]
Bits 7:5
Reserved
Bit 4
XIO
Set by the user to select between the register banks
0 = Bank 0
1 = Bank 1
Bit 3
Super
Indicates whether the CPU is executing user code or Supervisor Code. (This code cannot be accessed directly by the user.)
0 = User Code
1 = Supervisor Code
Bit 2
Carry
Set by CPU to indicate whether there has been a carry in the previous logical/arithmetic operation
0 = No Carry
1 = Carry
Bit 1
Zero
Set by CPU to indicate whether there has been a zero result in the previous logical/arithmetic operation
0 = Not Equal to Zero
1 = Equal to Zero
Bit 0
Global IE
Determines whether all interrupts are enabled or disabled
0 = Disabled
1 = Enabled
Note CPU_F register is only readable with explicit register address 0xF7. The OR F, expr and AND F, expr instructions must be used to set and
clear the CPU_F bits
Accumulator Register
Table 4. CPU Accumulator Register (CPU_A)
Bit #
7
6
5
4
3
2
1
0
Field
CPU Accumulator [7:0]
Read/Write
–
–
–
–
–
–
–
–
Default
0
0
0
0
0
0
0
0
Bits 7:0
CPU Accumulator [7:0]
8-bit data value holds the result of any logical/arithmetic instruction that uses a source addressing mode
Index Register
Table 5. CPU X Register (CPU_X)
Bit #
7
6
5
4
3
2
1
0
Field
X [7:0]
Read/Write
–
–
–
–
–
–
–
–
Default
0
0
0
0
0
0
0
0
Bits 7:0
X [7:0]
8-bit data value holds an index for any instruction that uses an indexed addressing mode
Stack Pointer Register
Table 6. CPU Stack Pointer Register (CPU_SP)
Bit #
7
6
5
4
3
2
1
0
Field
Stack Pointer [7:0]
Read/Write
–
–
–
–
–
–
–
–
Default
0
0
0
0
0
0
0
0
Document #: 001-07552 Rev. *B
Page 10 of 85
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