CY7C1339G
Electrical Characteristics Over the Operating Range[9, 10] (continued)
Parameter
Description
Test Conditions
ISB3
Automatic CE
VDD = Max, Device Deselected, or 4-ns cycle, 250 MHz
Power-down
VIN ≤ 0.3V or VIN > VDDQ – 0.3V
Current—CMOS Inputs f = fMAX = 1/tCYC
5-ns cycle, 200 MHz
6-ns cycle, 166 MHz
7.5-ns cycle, 133 MHz
ISB4
Automatic CE
VDD = Max, Device Deselected,
All Speeds
Power-down
VIN ≥ VIH or VIN ≤ VIL, f = 0
Current—TTL Inputs
Min.
Max. Unit
105 mA
95 mA
85 mA
75 mA
45 mA
Capacitance[11]
Parameter
Description
CIN
CCLK
CI/O
Input Capacitance
Clock Input Capacitance
Input/Output Capacitance
Thermal Resistance[11]
Test Conditions
TA = 25°C, f = 1 MHz,
VDD = 3.3V.
VDDQ = 3.3V
TQFP
Package
5
5
5
BGA
Package Unit
5
pF
5
pF
7
pF
Parameter
ΘJA
ΘJC
Description
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Test Conditions
Test conditions follow standard test
methods and procedures for
measuring thermal impedance, per
EIA/JESD51
TQFP
Package
30.32
6.85
BGA
Package
34.1
Unit
°C/W
14.0
°C/W
AC Test Loads and Waveforms
3.3V I/O Test Load
OUTPUT
Z0 = 50Ω
3.3V
OUTPUT
RL = 50Ω
5 pF
VT = 1.5V
(a)
INCLUDING
JIG AND
SCOPE
R = 317Ω
R = 351Ω
VDDQ
GND
ALL INPUT PULSES
10%
90%
≤ 1 ns
(b)
(c)
2.5V I/O Test Load
OUTPUT
Z0 = 50Ω
2.5V
OUTPUT
RL = 50Ω
5 pF
VT = 1.25V
R = 1667Ω
R = 1538Ω
VDDQ
GND
10%
≤ 1 ns
ALL INPUT PULSES
90%
INCLUDING
(a)
JIG AND
SCOPE
(b)
(c)
Note:
11. Tested initially and after any design or process change that may affect these parameters.
90%
10%
≤ 1 ns
90%
10%
≤ 1 ns
Document #: 38-05520 Rev. *F
Page 9 of 18
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